|
免費刊登 |
| 經安全檢測，此網站為安全網站，請放心前往原始網址! |
 |
how i declare array for input port - verilog - ObjectMix.comhi if i declare array for input port like input [1:0] in [7:0]; it is giving syntax error. if i use reg then its ok but ... objectmix.com |
 |
網址安全性掃描由  提供 |
||
